Sync register names with 3dbrew wiki

diff --git a/libctru/include/3ds/gpu/registers.h b/libctru/include/3ds/gpu/registers.h
index c8fd90e599ba86f09c21e831056a35ca423ff9e2..ab8976129a3e8fc8c4f0215174c6374eeb8fb4cc 100644 (file)
--- a/libctru/include/3ds/gpu/registers.h
+++ b/libctru/include/3ds/gpu/registers.h
@@ -1,5 +1,9 @@
 #pragma once\r
 \r
+//-----------------------------------------------------------------------------\r
+// Miscellaneous registers (0x000-0x03F)\r
+//-----------------------------------------------------------------------------\r
+\r
 #define GPUREG_0000 0x0000\r
 #define GPUREG_0001 0x0001\r
 #define GPUREG_0002 0x0002\r
@@ -64,11 +68,16 @@
 #define GPUREG_003D 0x003D\r
 #define GPUREG_003E 0x003E\r
 #define GPUREG_003F 0x003F\r
+\r
+//-----------------------------------------------------------------------------\r
+// Rasterizer registers (0x040-0x07F)\r
+//-----------------------------------------------------------------------------\r
+\r
 #define GPUREG_FACECULLING_CONFIG 0x0040\r
-#define GPUREG_0041 0x0041\r
-#define GPUREG_0042 0x0042\r
-#define GPUREG_0043 0x0043\r
-#define GPUREG_0044 0x0044\r
+#define GPUREG_VIEWPORT_WIDTH 0x0041\r
+#define GPUREG_VIEWPORT_INVW 0x0042\r
+#define GPUREG_VIEWPORT_HEIGHT 0x0043\r
+#define GPUREG_VIEWPORT_INVH 0x0044\r
 #define GPUREG_0045 0x0045\r
 #define GPUREG_0046 0x0046\r
 #define GPUREG_0047 0x0047\r
@@ -104,13 +113,13 @@
 #define GPUREG_SCISSORTEST_MODE 0x0065\r
 #define GPUREG_SCISSORTEST_POS 0x0066\r
 #define GPUREG_SCISSORTEST_DIM 0x0067\r
-#define GPUREG_0068 0x0068\r
+#define GPUREG_VIEWPORT_XY 0x0068\r
 #define GPUREG_0069 0x0069\r
 #define GPUREG_006A 0x006A\r
 #define GPUREG_006B 0x006B\r
 #define GPUREG_006C 0x006C\r
 #define GPUREG_006D 0x006D\r
-#define GPUREG_006E 0x006E\r
+#define GPUREG_FRAMEBUFFER_DIM2 0x006E\r
 #define GPUREG_006F 0x006F\r
 #define GPUREG_0070 0x0070\r
 #define GPUREG_0071 0x0071\r
@@ -128,7 +137,12 @@
 #define GPUREG_007D 0x007D\r
 #define GPUREG_007E 0x007E\r
 #define GPUREG_007F 0x007F\r
-#define GPUREG_TEXUNITS_CONFIG 0x0080\r
+\r
+//-----------------------------------------------------------------------------\r
+// Texturing registers (0x080-0x0FF)\r
+//-----------------------------------------------------------------------------\r
+\r
+#define GPUREG_TEXUNIT_ENABLE 0x0080\r
 #define GPUREG_TEXUNIT0_BORDER_COLOR 0x0081\r
 #define GPUREG_TEXUNIT0_DIM 0x0082\r
 #define GPUREG_TEXUNIT0_PARAM 0x0083\r
@@ -192,39 +206,39 @@
 #define GPUREG_00BD 0x00BD\r
 #define GPUREG_00BE 0x00BE\r
 #define GPUREG_00BF 0x00BF\r
-#define GPUREG_TEXENV0_CONFIG0 0x00C0\r
-#define GPUREG_TEXENV0_CONFIG1 0x00C1\r
-#define GPUREG_TEXENV0_CONFIG2 0x00C2\r
-#define GPUREG_TEXENV0_CONFIG3 0x00C3\r
-#define GPUREG_TEXENV0_CONFIG4 0x00C4\r
+#define GPUREG_TEXENV0_SOURCE 0x00C0\r
+#define GPUREG_TEXENV0_OPERAND 0x00C1\r
+#define GPUREG_TEXENV0_COMBINER 0x00C2\r
+#define GPUREG_TEXENV0_COLOR 0x00C3\r
+#define GPUREG_TEXENV0_SCALE 0x00C4\r
 #define GPUREG_00C5 0x00C5\r
 #define GPUREG_00C6 0x00C6\r
 #define GPUREG_00C7 0x00C7\r
-#define GPUREG_TEXENV1_CONFIG0 0x00C8\r
-#define GPUREG_TEXENV1_CONFIG1 0x00C9\r
-#define GPUREG_TEXENV1_CONFIG2 0x00CA\r
-#define GPUREG_TEXENV1_CONFIG3 0x00CB\r
-#define GPUREG_TEXENV1_CONFIG4 0x00CC\r
+#define GPUREG_TEXENV1_SOURCE 0x00C8\r
+#define GPUREG_TEXENV1_OPERAND 0x00C9\r
+#define GPUREG_TEXENV1_COMBINER 0x00CA\r
+#define GPUREG_TEXENV1_COLOR 0x00CB\r
+#define GPUREG_TEXENV1_SCALE 0x00CC\r
 #define GPUREG_00CD 0x00CD\r
 #define GPUREG_00CE 0x00CE\r
 #define GPUREG_00CF 0x00CF\r
-#define GPUREG_TEXENV2_CONFIG0 0x00D0\r
-#define GPUREG_TEXENV2_CONFIG1 0x00D1\r
-#define GPUREG_TEXENV2_CONFIG2 0x00D2\r
-#define GPUREG_TEXENV2_CONFIG3 0x00D3\r
-#define GPUREG_TEXENV2_CONFIG4 0x00D4\r
+#define GPUREG_TEXENV2_SOURCE 0x00D0\r
+#define GPUREG_TEXENV2_OPERAND 0x00D1\r
+#define GPUREG_TEXENV2_COMBINER 0x00D2\r
+#define GPUREG_TEXENV2_COLOR 0x00D3\r
+#define GPUREG_TEXENV2_SCALE 0x00D4\r
 #define GPUREG_00D5 0x00D5\r
 #define GPUREG_00D6 0x00D6\r
 #define GPUREG_00D7 0x00D7\r
-#define GPUREG_TEXENV3_CONFIG0 0x00D8\r
-#define GPUREG_TEXENV3_CONFIG1 0x00D9\r
-#define GPUREG_TEXENV3_CONFIG2 0x00DA\r
-#define GPUREG_TEXENV3_CONFIG3 0x00DB\r
-#define GPUREG_TEXENV3_CONFIG4 0x00DC\r
+#define GPUREG_TEXENV3_SOURCE 0x00D8\r
+#define GPUREG_TEXENV3_OPERAND 0x00D9\r
+#define GPUREG_TEXENV3_COMBINER 0x00DA\r
+#define GPUREG_TEXENV3_COLOR 0x00DB\r
+#define GPUREG_TEXENV3_SCALE 0x00DC\r
 #define GPUREG_00DD 0x00DD\r
 #define GPUREG_00DE 0x00DE\r
 #define GPUREG_00DF 0x00DF\r
-#define GPUREG_TEXENV_BUFFER_CONFIG 0x00E0\r
+#define GPUREG_TEXENV_UPDATE_BUFFER 0x00E0\r
 #define GPUREG_00E1 0x00E1\r
 #define GPUREG_00E2 0x00E2\r
 #define GPUREG_00E3 0x00E3\r
@@ -240,29 +254,34 @@
 #define GPUREG_00ED 0x00ED\r
 #define GPUREG_00EE 0x00EE\r
 #define GPUREG_00EF 0x00EF\r
-#define GPUREG_TEXENV4_CONFIG0 0x00F0\r
-#define GPUREG_TEXENV4_CONFIG1 0x00F1\r
-#define GPUREG_TEXENV4_CONFIG2 0x00F2\r
-#define GPUREG_TEXENV4_CONFIG3 0x00F3\r
-#define GPUREG_TEXENV4_CONFIG4 0x00F4\r
+#define GPUREG_TEXENV4_SOURCE 0x00F0\r
+#define GPUREG_TEXENV4_OPERAND 0x00F1\r
+#define GPUREG_TEXENV4_COMBINER 0x00F2\r
+#define GPUREG_TEXENV4_COLOR 0x00F3\r
+#define GPUREG_TEXENV4_SCALE 0x00F4\r
 #define GPUREG_00F5 0x00F5\r
 #define GPUREG_00F6 0x00F6\r
 #define GPUREG_00F7 0x00F7\r
-#define GPUREG_TEXENV5_CONFIG0 0x00F8\r
-#define GPUREG_TEXENV5_CONFIG1 0x00F9\r
-#define GPUREG_TEXENV5_CONFIG2 0x00FA\r
-#define GPUREG_TEXENV5_CONFIG3 0x00FB\r
-#define GPUREG_TEXENV5_CONFIG4 0x00FC\r
+#define GPUREG_TEXENV5_SOURCE 0x00F8\r
+#define GPUREG_TEXENV5_OPERAND 0x00F9\r
+#define GPUREG_TEXENV5_COMBINER 0x00FA\r
+#define GPUREG_TEXENV5_COLOR 0x00FB\r
+#define GPUREG_TEXENV5_SCALE 0x00FC\r
 #define GPUREG_TEXENV_BUFFER_COLOR 0x00FD\r
 #define GPUREG_00FE 0x00FE\r
 #define GPUREG_00FF 0x00FF\r
-#define GPUREG_COLOROUTPUT_CONFIG 0x0100\r
+\r
+//-----------------------------------------------------------------------------\r
+// Framebuffer registers (0x100-0x13F)\r
+//-----------------------------------------------------------------------------\r
+\r
+#define GPUREG_BLEND_ENABLE 0x0100\r
 #define GPUREG_BLEND_CONFIG 0x0101\r
-#define GPUREG_COLORLOGICOP_CONFIG 0x0102\r
+#define GPUREG_LOGICOP_CONFIG 0x0102\r
 #define GPUREG_BLEND_COLOR 0x0103\r
 #define GPUREG_ALPHATEST_CONFIG 0x0104\r
-#define GPUREG_STENCILTEST_CONFIG 0x0105\r
-#define GPUREG_STENCILOP_CONFIG 0x0106\r
+#define GPUREG_STENCIL_TEST 0x0105\r
+#define GPUREG_STENCIL_ACTION 0x0106\r
 #define GPUREG_DEPTHTEST_CONFIG 0x0107\r
 #define GPUREG_0108 0x0108\r
 #define GPUREG_0109 0x0109\r
@@ -272,21 +291,21 @@
 #define GPUREG_010D 0x010D\r
 #define GPUREG_010E 0x010E\r
 #define GPUREG_010F 0x010F\r
-#define GPUREG_0110 0x0110\r
-#define GPUREG_0111 0x0111\r
-#define GPUREG_0112 0x0112\r
-#define GPUREG_0113 0x0113\r
-#define GPUREG_0114 0x0114\r
-#define GPUREG_0115 0x0115\r
+#define GPUREG_FRAMEBUFFER_INVALIDATE 0x0110\r
+#define GPUREG_FRAMEBUFFER_FLUSH 0x0111\r
+#define GPUREG_COLORBUFFER_READ 0x0112\r
+#define GPUREG_COLORBUFFER_WRITE 0x0113\r
+#define GPUREG_DEPTHBUFFER_READ 0x0114\r
+#define GPUREG_DEPTHBUFFER_WRITE 0x0115\r
 #define GPUREG_DEPTHBUFFER_FORMAT 0x0116\r
 #define GPUREG_COLORBUFFER_FORMAT 0x0117\r
 #define GPUREG_0118 0x0118\r
 #define GPUREG_0119 0x0119\r
 #define GPUREG_011A 0x011A\r
-#define GPUREG_011B 0x011B\r
+#define GPUREG_FRAMEBUFFER_BLOCK32 0x011B\r
 #define GPUREG_DEPTHBUFFER_LOC 0x011C\r
 #define GPUREG_COLORBUFFER_LOC 0x011D\r
-#define GPUREG_OUTBUFFER_DIM 0x011E\r
+#define GPUREG_FRAMEBUFFER_DIM 0x011E\r
 #define GPUREG_011F 0x011F\r
 #define GPUREG_0120 0x0120\r
 #define GPUREG_0121 0x0121\r
@@ -320,6 +339,11 @@
 #define GPUREG_013D 0x013D\r
 #define GPUREG_013E 0x013E\r
 #define GPUREG_013F 0x013F\r
+\r
+//-----------------------------------------------------------------------------\r
+// Fragment lighting registers (0x140-0x1FF)\r
+//-----------------------------------------------------------------------------\r
+\r
 #define GPUREG_0140 0x0140\r
 #define GPUREG_0141 0x0141\r
 #define GPUREG_0142 0x0142\r
@@ -512,49 +536,54 @@
 #define GPUREG_01FD 0x01FD\r
 #define GPUREG_01FE 0x01FE\r
 #define GPUREG_01FF 0x01FF\r
+\r
+//-----------------------------------------------------------------------------\r
+// Geometry pipeline registers (0x200-0x27F)\r
+//-----------------------------------------------------------------------------\r
+\r
 #define GPUREG_ATTRIBBUFFERS_LOC 0x0200\r
 #define GPUREG_ATTRIBBUFFERS_FORMAT_LOW 0x0201\r
 #define GPUREG_ATTRIBBUFFERS_FORMAT_HIGH 0x0202\r
-#define GPUREG_ATTRIBBUFFER0_CONFIG0 0x0203\r
+#define GPUREG_ATTRIBBUFFER0_OFFSET 0x0203\r
 #define GPUREG_ATTRIBBUFFER0_CONFIG1 0x0204\r
 #define GPUREG_ATTRIBBUFFER0_CONFIG2 0x0205\r
-#define GPUREG_ATTRIBBUFFER1_CONFIG0 0x0206\r
+#define GPUREG_ATTRIBBUFFER1_OFFSET 0x0206\r
 #define GPUREG_ATTRIBBUFFER1_CONFIG1 0x0207\r
 #define GPUREG_ATTRIBBUFFER1_CONFIG2 0x0208\r
-#define GPUREG_ATTRIBBUFFER2_CONFIG0 0x0209\r
+#define GPUREG_ATTRIBBUFFER2_OFFSET 0x0209\r
 #define GPUREG_ATTRIBBUFFER2_CONFIG1 0x020A\r
 #define GPUREG_ATTRIBBUFFER2_CONFIG2 0x020B\r
-#define GPUREG_ATTRIBBUFFER3_CONFIG0 0x020C\r
+#define GPUREG_ATTRIBBUFFER3_OFFSET 0x020C\r
 #define GPUREG_ATTRIBBUFFER3_CONFIG1 0x020D\r
 #define GPUREG_ATTRIBBUFFER3_CONFIG2 0x020E\r
-#define GPUREG_ATTRIBBUFFER4_CONFIG0 0x020F\r
+#define GPUREG_ATTRIBBUFFER4_OFFSET 0x020F\r
 #define GPUREG_ATTRIBBUFFER4_CONFIG1 0x0210\r
 #define GPUREG_ATTRIBBUFFER4_CONFIG2 0x0211\r
-#define GPUREG_ATTRIBBUFFER5_CONFIG0 0x0212\r
+#define GPUREG_ATTRIBBUFFER5_OFFSET 0x0212\r
 #define GPUREG_ATTRIBBUFFER5_CONFIG1 0x0213\r
 #define GPUREG_ATTRIBBUFFER5_CONFIG2 0x0214\r
-#define GPUREG_ATTRIBBUFFER6_CONFIG0 0x0215\r
+#define GPUREG_ATTRIBBUFFER6_OFFSET 0x0215\r
 #define GPUREG_ATTRIBBUFFER6_CONFIG1 0x0216\r
 #define GPUREG_ATTRIBBUFFER6_CONFIG2 0x0217\r
-#define GPUREG_ATTRIBBUFFER7_CONFIG0 0x0218\r
+#define GPUREG_ATTRIBBUFFER7_OFFSET 0x0218\r
 #define GPUREG_ATTRIBBUFFER7_CONFIG1 0x0219\r
 #define GPUREG_ATTRIBBUFFER7_CONFIG2 0x021A\r
-#define GPUREG_ATTRIBBUFFER8_CONFIG0 0x021B\r
+#define GPUREG_ATTRIBBUFFER8_OFFSET 0x021B\r
 #define GPUREG_ATTRIBBUFFER8_CONFIG1 0x021C\r
 #define GPUREG_ATTRIBBUFFER8_CONFIG2 0x021D\r
-#define GPUREG_ATTRIBBUFFER9_CONFIG0 0x021E\r
+#define GPUREG_ATTRIBBUFFER9_OFFSET 0x021E\r
 #define GPUREG_ATTRIBBUFFER9_CONFIG1 0x021F\r
 #define GPUREG_ATTRIBBUFFER9_CONFIG2 0x0220\r
-#define GPUREG_ATTRIBBUFFERA_CONFIG0 0x0221\r
+#define GPUREG_ATTRIBBUFFERA_OFFSET 0x0221\r
 #define GPUREG_ATTRIBBUFFERA_CONFIG1 0x0222\r
 #define GPUREG_ATTRIBBUFFERA_CONFIG2 0x0223\r
-#define GPUREG_ATTRIBBUFFERB_CONFIG0 0x0224\r
+#define GPUREG_ATTRIBBUFFERB_OFFSET 0x0224\r
 #define GPUREG_ATTRIBBUFFERB_CONFIG1 0x0225\r
 #define GPUREG_ATTRIBBUFFERB_CONFIG2 0x0226\r
 #define GPUREG_INDEXBUFFER_CONFIG 0x0227\r
 #define GPUREG_NUMVERTICES 0x0228\r
 #define GPUREG_GEOSTAGE_CONFIG 0x0229\r
-#define GPUREG_DRAW_VERTEX_OFFSET 0x022A\r
+#define GPUREG_VERTEX_OFFSET 0x022A\r
 #define GPUREG_022B 0x022B\r
 #define GPUREG_022C 0x022C\r
 #define GPUREG_022D 0x022D\r
@@ -562,18 +591,18 @@
 #define GPUREG_DRAWELEMENTS 0x022F\r
 #define GPUREG_0230 0x0230\r
 #define GPUREG_0231 0x0231\r
-#define GPUREG_0232 0x0232\r
-#define GPUREG_0233 0x0233\r
-#define GPUREG_0234 0x0234\r
-#define GPUREG_0235 0x0235\r
+#define GPUREG_FIXEDATTRIB_INDEX 0x0232\r
+#define GPUREG_FIXEDATTRIB_DATA0 0x0233\r
+#define GPUREG_FIXEDATTRIB_DATA1 0x0234\r
+#define GPUREG_FIXEDATTRIB_DATA2 0x0235\r
 #define GPUREG_0236 0x0236\r
 #define GPUREG_0237 0x0237\r
-#define GPUREG_0238 0x0238\r
-#define GPUREG_0239 0x0239\r
-#define GPUREG_023A 0x023A\r
-#define GPUREG_023B 0x023B\r
-#define GPUREG_023C 0x023C\r
-#define GPUREG_023D 0x023D\r
+#define GPUREG_CMDBUF_SIZE0 0x0238\r
+#define GPUREG_CMDBUF_SIZE1 0x0239\r
+#define GPUREG_CMDBUF_ADDR0 0x023A\r
+#define GPUREG_CMDBUF_ADDR1 0x023B\r
+#define GPUREG_CMDBUF_JUMP0 0x023C\r
+#define GPUREG_CMDBUF_JUMP1 0x023D\r
 #define GPUREG_023E 0x023E\r
 #define GPUREG_023F 0x023F\r
 #define GPUREG_0240 0x0240\r
@@ -607,7 +636,7 @@
 #define GPUREG_025C 0x025C\r
 #define GPUREG_025D 0x025D\r
 #define GPUREG_PRIMITIVE_CONFIG 0x025E\r
-#define GPUREG_025F 0x025F\r
+#define GPUREG_RESTART_PRIMITIVE 0x025F\r
 #define GPUREG_0260 0x0260\r
 #define GPUREG_0261 0x0261\r
 #define GPUREG_0262 0x0262\r
@@ -640,6 +669,12 @@
 #define GPUREG_027D 0x027D\r
 #define GPUREG_027E 0x027E\r
 #define GPUREG_027F 0x027F\r
+\r
+//-----------------------------------------------------------------------------\r
+// Shader registers (0x280-0x2DF)\r
+//-----------------------------------------------------------------------------\r
+\r
+// Geometry shader\r
 #define GPUREG_GSH_BOOLUNIFORM 0x0280\r
 #define GPUREG_GSH_INTUNIFORM_I0 0x0281\r
 #define GPUREG_GSH_INTUNIFORM_I1 0x0282\r
@@ -667,6 +702,8 @@
 #define GPUREG_GSH_OPDESCS_DATA 0x02A6\r
 #define GPUREG_02AE 0x02AE\r
 #define GPUREG_02AF 0x02AF\r
+\r
+// Vertex shader\r
 #define GPUREG_VSH_BOOLUNIFORM 0x02B0\r
 #define GPUREG_VSH_INTUNIFORM_I0 0x02B1\r
 #define GPUREG_VSH_INTUNIFORM_I1 0x02B2\r
@@ -694,6 +731,11 @@
 #define GPUREG_VSH_OPDESCS_DATA 0x02D6\r
 #define GPUREG_02DE 0x02DE\r
 #define GPUREG_02DF 0x02DF\r
+\r
+//-----------------------------------------------------------------------------\r
+// Unknown registers (0x2E0-0x2FF)\r
+//-----------------------------------------------------------------------------\r
+\r
 #define GPUREG_02E0 0x02E0\r
 #define GPUREG_02E1 0x02E1\r
 #define GPUREG_02E2 0x02E2\r

diff --git a/libctru/source/gpu/gpu-old.c b/libctru/source/gpu/gpu-old.c
index 96cd54e503de71c07291d2fd48b16ee9d7bfc00a..42479032135042268568bf47fb63cbda66592a4b 100644 (file)
--- a/libctru/source/gpu/gpu-old.c
+++ b/libctru/source/gpu/gpu-old.c
@@ -42,8 +42,8 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
        float fw=(float)w;
        float fh=(float)h;
 
-       GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
-       GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
 
        u32 f116e=0x01000000|(((h-1)&0xFFF)<<12)|(w&0xFFF);
 
@@ -52,18 +52,18 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
        param[0x2]=f116e;
        GPUCMD_AddIncrementalWrites(GPUREG_DEPTHBUFFER_LOC, param, 0x00000003);
 
-       GPUCMD_AddWrite(GPUREG_006E, f116e);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_DIM2, f116e);
        GPUCMD_AddWrite(GPUREG_DEPTHBUFFER_FORMAT, 0x00000003); //depth buffer format
        GPUCMD_AddWrite(GPUREG_COLORBUFFER_FORMAT, 0x00000002); //color buffer format
-       GPUCMD_AddWrite(GPUREG_011B, 0x00000000); //?
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_BLOCK32, 0x00000000); //?
 
        param[0x0]=f32tof24(fw/2);
        param[0x1]=f32tof31(2.0f / fw) << 1;
        param[0x2]=f32tof24(fh/2);
        param[0x3]=f32tof31(2.0f / fh) << 1;
-       GPUCMD_AddIncrementalWrites(GPUREG_0041, param, 0x00000004);
+       GPUCMD_AddIncrementalWrites(GPUREG_VIEWPORT_WIDTH, param, 0x00000004);
 
-       GPUCMD_AddWrite(GPUREG_0068, (y<<16)|(x&0xFFFF));
+       GPUCMD_AddWrite(GPUREG_VIEWPORT_XY, (y<<16)|(x&0xFFFF));
 
        param[0x0]=0x00000000;
        param[0x1]=0x00000000;
@@ -75,7 +75,7 @@ void GPU_SetViewport(u32* depthBuffer, u32* colorBuffer, u32 x, u32 y, u32 w, u3
        param[0x1]=0x0000000F;
        param[0x2]=0x00000002;
        param[0x3]=0x00000002;
-       GPUCMD_AddIncrementalWrites(GPUREG_0112, param, 0x00000004);
+       GPUCMD_AddIncrementalWrites(GPUREG_COLORBUFFER_READ, param, 0x00000004);
 }
 
 void GPU_SetScissorTest(GPU_SCISSORMODE mode, u32 x, u32 y, u32 w, u32 h)
@@ -102,12 +102,12 @@ void GPU_SetAlphaTest(bool enable, GPU_TESTFUNC function, u8 ref)
 
 void GPU_SetStencilTest(bool enable, GPU_TESTFUNC function, u8 ref, u8 input_mask, u8 write_mask)
 {
-       GPUCMD_AddWrite(GPUREG_STENCILTEST_CONFIG, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24));
+       GPUCMD_AddWrite(GPUREG_STENCIL_TEST, (enable&1)|((function&7)<<4)|(write_mask<<8)|(ref<<16)|(input_mask<<24));
 }
 
 void GPU_SetStencilOp(GPU_STENCILOP sfail, GPU_STENCILOP dfail, GPU_STENCILOP pass)
 {
-       GPUCMD_AddWrite(GPUREG_STENCILOP_CONFIG, sfail | (dfail << 4) | (pass << 8));
+       GPUCMD_AddWrite(GPUREG_STENCIL_ACTION, sfail | (dfail << 4) | (pass << 8));
 }
 
 void GPU_SetDepthTestAndWriteMask(bool enable, GPU_TESTFUNC function, GPU_WRITEMASK writemask)
@@ -120,13 +120,13 @@ void GPU_SetAlphaBlending(GPU_BLENDEQUATION colorEquation, GPU_BLENDEQUATION alp
        GPU_BLENDFACTOR alphaSrc, GPU_BLENDFACTOR alphaDst)
 {
        GPUCMD_AddWrite(GPUREG_BLEND_CONFIG, colorEquation | (alphaEquation<<8) | (colorSrc<<16) | (colorDst<<20) | (alphaSrc<<24) | (alphaDst<<28));
-       GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000100);
+       GPUCMD_AddMaskedWrite(GPUREG_BLEND_ENABLE, 0x2, 0x00000100);
 }
 
 void GPU_SetColorLogicOp(GPU_LOGICOP op)
 {
-       GPUCMD_AddWrite(GPUREG_COLORLOGICOP_CONFIG, op);
-       GPUCMD_AddMaskedWrite(GPUREG_COLOROUTPUT_CONFIG, 0x2, 0x00000000);
+       GPUCMD_AddWrite(GPUREG_LOGICOP_CONFIG, op);
+       GPUCMD_AddMaskedWrite(GPUREG_BLEND_ENABLE, 0x2, 0x00000000);
 }
 
 void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
@@ -137,7 +137,7 @@ void GPU_SetBlendingColor(u8 r, u8 g, u8 b, u8 a)
 void GPU_SetTextureEnable(GPU_TEXUNIT units)
 {
        GPUCMD_AddMaskedWrite(GPUREG_006F, 0x2, units<<8);                      // enables texcoord outputs
-       GPUCMD_AddWrite(GPUREG_TEXUNITS_CONFIG, 0x00011000|units);      // enables texture units
+       GPUCMD_AddWrite(GPUREG_TEXUNIT_ENABLE, 0x00011000|units);       // enables texture units
 }
 
 void GPU_SetTexture(GPU_TEXUNIT unit, u32* data, u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType)
@@ -235,7 +235,7 @@ void GPU_SetFaceCulling(GPU_CULLMODE mode)
 
 void GPU_SetCombinerBufferWrite(u8 rgb_config, u8 alpha_config)
 {
-    GPUCMD_AddMaskedWrite(GPUREG_TEXENV_BUFFER_CONFIG, 0x2, (rgb_config << 8) | (alpha_config << 12));
+    GPUCMD_AddMaskedWrite(GPUREG_TEXENV_UPDATE_BUFFER, 0x2, (rgb_config << 8) | (alpha_config << 12));
 }
 
 const u8 GPU_TEVID[]={0xC0,0xC8,0xD0,0xD8,0xF0,0xF8};
@@ -259,13 +259,13 @@ void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
 {
        //set primitive type
        GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
-       GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
+       GPUCMD_AddMaskedWrite(GPUREG_RESTART_PRIMITIVE, 0x2, 0x00000001);
        //index buffer address register should be cleared (except bit 31) before drawing
        GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000);
        //pass number of vertices
        GPUCMD_AddWrite(GPUREG_NUMVERTICES, count);
        //set first vertex
-       GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, first);
+       GPUCMD_AddWrite(GPUREG_VERTEX_OFFSET, first);
 
        //all the following except 0x000F022E might be useless
        GPUCMD_AddMaskedWrite(GPUREG_0253, 0x1, 0x00000001);
@@ -273,20 +273,20 @@ void GPU_DrawArray(GPU_Primitive_t primitive, u32 first, u32 count)
        GPUCMD_AddWrite(GPUREG_DRAWARRAYS, 0x00000001);
        GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
        GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
-       GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
 }
 
 void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
 {
        //set primitive type
        GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x2, primitive);
-       GPUCMD_AddMaskedWrite(GPUREG_025F, 0x2, 0x00000001);
+       GPUCMD_AddMaskedWrite(GPUREG_RESTART_PRIMITIVE, 0x2, 0x00000001);
        //index buffer (TODO : support multiple types)
        GPUCMD_AddWrite(GPUREG_INDEXBUFFER_CONFIG, 0x80000000|((u32)indexArray));
        //pass number of vertices
        GPUCMD_AddWrite(GPUREG_NUMVERTICES, n);
        
-       GPUCMD_AddWrite(GPUREG_DRAW_VERTEX_OFFSET, 0x00000000);
+       GPUCMD_AddWrite(GPUREG_VERTEX_OFFSET, 0x00000000);
        
        GPUCMD_AddMaskedWrite(GPUREG_GEOSTAGE_CONFIG, 0x2, 0x00000100);
        GPUCMD_AddMaskedWrite(GPUREG_0253, 0x2, 0x00000100);
@@ -296,12 +296,12 @@ void GPU_DrawElements(GPU_Primitive_t primitive, u32* indexArray, u32 n)
        GPUCMD_AddMaskedWrite(GPUREG_0245, 0x1, 0x00000001);
        GPUCMD_AddWrite(GPUREG_0231, 0x00000001);
        
-       // CHECKME: does this one also require command 0x0111 at the end?
+       // CHECKME: does this one also require GPUREG_FRAMEBUFFER_FLUSH at the end?
 }
 
 void GPU_FinishDrawing()
 {
-       GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
-       GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
        GPUCMD_AddWrite(GPUREG_0063, 0x00000001);
 }

diff --git a/libctru/source/gpu/gpu.c b/libctru/source/gpu/gpu.c
index db73a321c7a6e4d5d5e0f53ebbdb48daa76e131a..b97b006564c51e806c58aab27ebabd020046f8f2 100644 (file)
--- a/libctru/source/gpu/gpu.c
+++ b/libctru/source/gpu/gpu.c
@@ -83,8 +83,8 @@ void GPUCMD_Add(u32 header, u32* param, u32 paramlength)
 void GPUCMD_Finalize(void)
 {
        GPUCMD_AddMaskedWrite(GPUREG_PRIMITIVE_CONFIG, 0x8, 0x00000000);
-       GPUCMD_AddWrite(GPUREG_0111, 0x00000001);
-       GPUCMD_AddWrite(GPUREG_0110, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_FLUSH, 0x00000001);
+       GPUCMD_AddWrite(GPUREG_FRAMEBUFFER_INVALIDATE, 0x00000001);
        GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678);
        GPUCMD_AddWrite(GPUREG_FINALIZE, 0x12345678); //not the cleanest way of guaranteeing 0x10-byte size but whatever good enough for now
 }