Update misc code

diff --git a/source/menu.c b/source/menu.c
index 011b3766aa0e851d49ff8407ea5f3cc5af2a8d57..56e2ed23e7cb9a4502b42163b6b4d684df47b168 100644 (file)
--- a/source/menu.c
+++ b/source/menu.c
@@ -53,12 +53,12 @@ static struct options_s options[] = {
     { IGNORE_BROKEN_SHIT,  "Allow unsafe options", boolean_val, 0, 0 },
 
     // Sentinel.
-    { -1, "", 0, 0, 0 },
+    { -1, "", 0, -1, -1 }, // cursor_min and cursor_max are stored in the last two.
 };
 
 static int cursor_y = 0;
-static int cursor_max = -1;
 static int cursor_min = -1;
+static int cursor_max = -1;
 static int which_menu = 1;
 static int need_redraw = 1;
 
@@ -338,6 +338,8 @@ menu_main()
             if (ret == MENU_BOOTME)
                 return MENU_BOOTME; // Boot meh, damnit!
                    clear_screen(TOP_SCREEN);
+                       if (ret == MENU_OPTIONS)
+                               cursor_y = cursor_min; // Fixup positions
             return ret;
     }
 
@@ -359,7 +361,6 @@ menu_handler()
             to_menu = menu_main();
             break;
         case MENU_OPTIONS:
-                       cursor_y = cursor_min; // Fixup positions
             to_menu = menu_options();
             break;
         case MENU_PATCHES:

diff --git a/source/start.s b/source/start.s
index 0877155701a693f8f0375f0affef5c96c06d0fe1..2ec4c5e43a7189d7d2b49f5313f471fed9941620 100644 (file)
--- a/source/start.s
+++ b/source/start.s
@@ -2,15 +2,22 @@
 .align 4
 .global _start
 _start:
-    // Change the stack pointer
+    @ Change the stack pointer
     mov sp, #0x27000000
 
-    // Give read/write access to all the memory regions
+    @ Disable caches / mpu
+    mrc p15, 0, r4, c1, c0, 0  @ read control register
+    bic r4, #(1<<12)           @ - instruction cache disable
+    bic r4, #(1<<2)            @ - data cache disable
+    bic r4, #(1<<0)            @ - mpu disable
+    mcr p15, 0, r4, c1, c0, 0  @ write control register
+
+    @ Give read/write access to all the memory regions
     ldr r5, =0x33333333
     mcr p15, 0, r5, c5, c0, 2 @ write data access
     mcr p15, 0, r5, c5, c0, 3 @ write instruction access
 
-    // Sets MPU permissions and cache settings
+    @ Sets MPU permissions and cache settings
     ldr r0, =0xFFFF001D        @ ffff0000 32k
     ldr r1, =0x01FF801D        @ 01ff8000 32k
     ldr r2, =0x08000027        @ 08000000 1M
@@ -30,11 +37,25 @@ _start:
     mcr p15, 0, r5, c6, c5, 0
     mcr p15, 0, r6, c6, c6, 0
     mcr p15, 0, r7, c6, c7, 0
+    mcr p15, 0, r10, c3, c0, 0 @ Write bufferable 0, 2, 5
+    mcr p15, 0, r11, c2, c0, 0 @ Data cacheable 0, 2, 5
+    mcr p15, 0, r12, c2, c0, 1 @ Inst cacheable 0, 2, 5
+
+    @ Enable caches
+    mrc p15, 0, r4, c1, c0, 0  @ read control register
+    orr r4, r4, #(1<<18)       @ - itcm enable
+    orr r4, r4, #(1<<12)       @ - instruction cache enable
+    orr r4, r4, #(1<<2)        @ - data cache enable
+    orr r4, r4, #(1<<0)        @ - mpu enable
+    mcr p15, 0, r4, c1, c0, 0  @ write control register
 
-       // Yes, you're reading correctly. We are NOT enabling instruction caching.
-       // It causes issues with the linker, which is why it is left off.
+    @ Flush caches
+    mov r5, #0
+    mcr p15, 0, r5, c7, c5, 0  @ flush I-cache
+    mcr p15, 0, r5, c7, c6, 0  @ flush D-cache
+    mcr p15, 0, r5, c7, c10, 4 @ drain write buffer
 
-    // Fixes mounting of SDMC
+    @ Fixes mounting of SDMC
        ldr r0, =0x10000020
        mov r1, #0x340
        str r1, [r0]