bne inner
boot:
+ // Flush caches
+
+ // ICache
+ mov r0, #0
+ mcr p15, 0, r0, c7, c5, 0
+
+ // DCache
+ mov r2, #0
+ mov r1, r2
+ flush_dcache:
+ mov r0, #0
+ mov r3, r2, lsl #30
+ flush_cache_inner_loop:
+ orr r12, r3, r0, lsl#5
+ mcr p15, 0, r1, c7, c10, 4 // drain write buffer
+ mcr p15, 0, r12, c7, c14, 2 // clean and flush dcache entry (index and segment)
+ add r0, #1
+ cmp r0, #0x20
+ bcc flush_cache_inner_loop
+ add r2, #1
+ cmp r2, #4
+ bcc flush_dcache
+
+ // Actually boot payload.
ldr r3, offset
bx r3