GPU : initial code (untested)

diff --git a/libctru/include/ctr/GPU.h b/libctru/include/ctr/GPU.h
new file mode 100644 (file)
index 0000000..8fd70ca
--- /dev/null
+++ b/libctru/include/ctr/GPU.h
@@ -0,0 +1,6 @@
+#ifndef GPU_H
+#define GPU_H
+
+void GPU_Init(Handle *gsphandle);
+
+#endif

diff --git a/libctru/include/ctr/GSP.h b/libctru/include/ctr/GSP.h
index 3f95dfc162aa0a8eec82b385528720b378203cb5..db31ab18e04a4935bb36ceb44990decb888699b8 100644 (file)
--- a/libctru/include/ctr/GSP.h
+++ b/libctru/include/ctr/GSP.h
@@ -1,6 +1,8 @@
 #ifndef GSP_H
 #define GSP_H
 
+#define GSP_REBASE_REG(r) ((r)-0x1EB00000)
+
 void gspInit();
 void gspExit();
 
@@ -8,11 +10,12 @@ Result GSPGPU_AcquireRight(Handle *handle, u8 flags);
 Result GSPGPU_ReleaseRight(Handle *handle);
 Result GSPGPU_SetLcdForceBlack(Handle *handle, u8 flags);
 Result GSPGPU_FlushDataCache(Handle *handle, u8* adr, u32 size);
-Result GSPGPU_WriteHWRegs(Handle *handle, u32 regAddr, u8* data, u8 size);
-Result GSPGPU_ReadHWRegs(Handle *handle, u32 regAddr, u8* data, u8 size);
+Result GSPGPU_WriteHWRegs(Handle *handle, u32 regAddr, u32* data, u8 size);
+Result GSPGPU_WriteHWRegsWithMask(Handle* handle, u32 regAddr, u32* data, u8 datasize, u32* maskdata, u8 masksize);
+Result GSPGPU_ReadHWRegs(Handle *handle, u32 regAddr, u32* data, u8 size);
 Result GSPGPU_RegisterInterruptRelayQueue(Handle *handle, Handle eventHandle, u32 flags, Handle* outMemHandle, u8* threadID);
 Result GSPGPU_UnregisterInterruptRelayQueue(Handle* handle);
 Result GSPGPU_TriggerCmdReqQueue(Handle *handle);
-Result GSPGPU_submitGxCommand(u32* sharedGspCmdBuf, u32 gxCommand[0x20], Handle* handle);
+Result GSPGPU_submitGxCommand(u32* sharedGspCmdBuf, u32 gxCommand[0x8], Handle* handle);
 
 #endif

diff --git a/libctru/source/GPU.c b/libctru/source/GPU.c
new file mode 100644 (file)
index 0000000..ede428d
--- /dev/null
+++ b/libctru/source/GPU.c
@@ -0,0 +1,90 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <ctr/types.h>
+#include <ctr/GSP.h>
+#include <ctr/GX.h>
+#include <ctr/GPU.h>
+#include <ctr/svc.h>
+
+const u32 gpuRegInitTable[]={0x1EF01000, 0x00000000,
+                                               0x1EF01080, 0x12345678,
+                                               0x1EF010C0, 0xFFFFFFF0,
+                                               0x1EF010D0, 0x00000001};
+
+const u32 gpuRegTopScreenInitTable[]={0x1EF00400, 0x000001C2,
+                                                               0x1EF00404, 0x000000D1,
+                                                               0x1EF00408, 0x000001C1,
+                                                               0x1EF0040C, 0x000001C1,
+                                                               0x1EF00410, 0x00000000,
+                                                               0x1EF00414, 0x000000CF,
+                                                               0x1EF00418, 0x000000D1,
+                                                               0x1EF0041C, 0x01C501C1,
+                                                               0x1EF00420, 0x00010000,
+                                                               0x1EF00424, 0x0000019D,
+                                                               0x1EF00428, 0x00000002,
+                                                               0x1EF0042C, 0x00000192,
+                                                               0x1EF00430, 0x00000192,
+                                                               0x1EF00434, 0x00000192,
+                                                               0x1EF00438, 0x00000001,
+                                                               0x1EF0043C, 0x00000002,
+                                                               0x1EF00440, 0x01960192,
+                                                               0x1EF00444, 0x00000000,
+                                                               0x1EF00448, 0x00000000,
+                                                               0x1EF0045C, 0x019000F0,
+                                                               0x1EF00460, 0x01C100D1,
+                                                               0x1EF00464, 0x01920002,
+                                                               0x1EF00470, 0x00080340,
+                                                               0x1EF0049C, 0x00000000,
+
+                                                               0x1EF00468, 0x18300000,
+                                                               0x1EF0046C, 0x18300000,
+                                                               0x1EF00494, 0x18300000,
+                                                               0x1EF00498, 0x18300000,
+                                                               0x1EF00478, 0x18300000};
+
+Result writeRegisterValues(Handle* handle, u32* table, u32 num)
+{
+       if(!table || !num)return -1;
+       int i;
+       Result ret;
+       for(i=0;i<num;i++)
+       {
+               if((ret=GSPGPU_WriteHWRegs(handle, GSP_REBASE_REG(table[0]), &table[1], 4)))return ret;
+               table+=2;
+       }
+       return 0;
+}
+
+void GPU_Init(Handle *gsphandle)
+{
+       u32 data;
+       u32 mask;
+
+       writeRegisterValues(gsphandle, (u32*)gpuRegInitTable, sizeof(gpuRegInitTable)/8);
+       writeRegisterValues(gsphandle, (u32*)gpuRegTopScreenInitTable, sizeof(gpuRegTopScreenInitTable)/8);
+
+       data=0x00;
+       mask=0xFF00;
+       GSPGPU_WriteHWRegsWithMask(gsphandle, GSP_REBASE_REG(0x1EF00C18), &data, 4, &mask, 4);
+       
+       data=0x70100;
+       GSPGPU_WriteHWRegs(gsphandle, GSP_REBASE_REG(0x1EF00004), &data, 4);
+
+       data=0x00;
+       mask=0xFF;
+       GSPGPU_WriteHWRegsWithMask(gsphandle, GSP_REBASE_REG(0x1EF0001C), &data, 4, &mask, 4);
+
+       mask=0xFF;
+       GSPGPU_WriteHWRegsWithMask(gsphandle, GSP_REBASE_REG(0x1EF0002C), &data, 4, &mask, 4);
+       
+       data=0x22221200;
+       GSPGPU_WriteHWRegsWithMask(gsphandle, GSP_REBASE_REG(0x1EF00050), &data, 4, &mask, 4);
+
+       data=0x0000FF52;
+       mask=0x00FF52FF;
+       GSPGPU_WriteHWRegsWithMask(gsphandle, GSP_REBASE_REG(0x1EF00054), &data, 4, &mask, 4);
+       
+       data=0x10501;
+       GSPGPU_WriteHWRegs(gsphandle, GSP_REBASE_REG(0x1EF00474), &data, 4);
+}

diff --git a/libctru/source/GSP.c b/libctru/source/GSP.c
index b60bfb9b7fae9e5181c77d0b54b6c0d4d23de164..310707ad9a4c988fda692a8a864080e39d765fb5 100644 (file)
--- a/libctru/source/GSP.c
+++ b/libctru/source/GSP.c
@@ -4,6 +4,7 @@
 #include <ctr/types.h>
 #include <ctr/GSP.h>
 #include <ctr/svc.h>
+#include <ctr/srv.h>
 
 Handle gspGpuHandle=0;
 
@@ -78,7 +79,7 @@ Result GSPGPU_FlushDataCache(Handle* handle, u8* adr, u32 size)
        return cmdbuf[1];
 }
 
-Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size)
+Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u32* data, u8 size)
 {
        if(!handle)handle=&gspGpuHandle;
        
@@ -97,7 +98,28 @@ Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size)
        return cmdbuf[1];
 }
 
-Result GSPGPU_ReadHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size)
+Result GSPGPU_WriteHWRegsWithMask(Handle* handle, u32 regAddr, u32* data, u8 datasize, u32* maskdata, u8 masksize)
+{
+       if(!handle)handle=&gspGpuHandle;
+       
+       if(datasize>0x80 || !data)return -1;
+
+       u32* cmdbuf=getThreadCommandBuffer();
+       cmdbuf[0]=0x20084; //request header code
+       cmdbuf[1]=regAddr;
+       cmdbuf[2]=datasize;
+       cmdbuf[3]=(datasize<<14)|2;
+       cmdbuf[4]=(u32)data;
+       cmdbuf[5]=(masksize<<14)|0x402;
+       cmdbuf[6]=(u32)maskdata;
+
+       Result ret=0;
+       if((ret=svc_sendSyncRequest(*handle)))return ret;
+
+       return cmdbuf[1];
+}
+
+Result GSPGPU_ReadHWRegs(Handle* handle, u32 regAddr, u32* data, u8 size)
 {
        if(!handle)handle=&gspGpuHandle;