From 04b1425f8694511dec912155c340524cd0a6af15 Mon Sep 17 00:00:00 2001 From: smea Date: Sun, 2 Mar 2014 16:01:57 +0100 Subject: [PATCH] GPU : initial code (untested) --- libctru/include/ctr/GPU.h | 6 +++ libctru/include/ctr/GSP.h | 9 ++-- libctru/source/GPU.c | 90 +++++++++++++++++++++++++++++++++++++++ libctru/source/GSP.c | 26 ++++++++++- 4 files changed, 126 insertions(+), 5 deletions(-) create mode 100644 libctru/include/ctr/GPU.h create mode 100644 libctru/source/GPU.c diff --git a/libctru/include/ctr/GPU.h b/libctru/include/ctr/GPU.h new file mode 100644 index 0000000..8fd70ca --- /dev/null +++ b/libctru/include/ctr/GPU.h @@ -0,0 +1,6 @@ +#ifndef GPU_H +#define GPU_H + +void GPU_Init(Handle *gsphandle); + +#endif diff --git a/libctru/include/ctr/GSP.h b/libctru/include/ctr/GSP.h index 3f95dfc..db31ab1 100644 --- a/libctru/include/ctr/GSP.h +++ b/libctru/include/ctr/GSP.h @@ -1,6 +1,8 @@ #ifndef GSP_H #define GSP_H +#define GSP_REBASE_REG(r) ((r)-0x1EB00000) + void gspInit(); void gspExit(); @@ -8,11 +10,12 @@ Result GSPGPU_AcquireRight(Handle *handle, u8 flags); Result GSPGPU_ReleaseRight(Handle *handle); Result GSPGPU_SetLcdForceBlack(Handle *handle, u8 flags); Result GSPGPU_FlushDataCache(Handle *handle, u8* adr, u32 size); -Result GSPGPU_WriteHWRegs(Handle *handle, u32 regAddr, u8* data, u8 size); -Result GSPGPU_ReadHWRegs(Handle *handle, u32 regAddr, u8* data, u8 size); +Result GSPGPU_WriteHWRegs(Handle *handle, u32 regAddr, u32* data, u8 size); +Result GSPGPU_WriteHWRegsWithMask(Handle* handle, u32 regAddr, u32* data, u8 datasize, u32* maskdata, u8 masksize); +Result GSPGPU_ReadHWRegs(Handle *handle, u32 regAddr, u32* data, u8 size); Result GSPGPU_RegisterInterruptRelayQueue(Handle *handle, Handle eventHandle, u32 flags, Handle* outMemHandle, u8* threadID); Result GSPGPU_UnregisterInterruptRelayQueue(Handle* handle); Result GSPGPU_TriggerCmdReqQueue(Handle *handle); -Result GSPGPU_submitGxCommand(u32* sharedGspCmdBuf, u32 gxCommand[0x20], Handle* handle); +Result GSPGPU_submitGxCommand(u32* sharedGspCmdBuf, u32 gxCommand[0x8], Handle* handle); #endif diff --git a/libctru/source/GPU.c b/libctru/source/GPU.c new file mode 100644 index 0000000..ede428d --- /dev/null +++ b/libctru/source/GPU.c @@ -0,0 +1,90 @@ +#include +#include +#include +#include +#include +#include +#include +#include + +const u32 gpuRegInitTable[]={0x1EF01000, 0x00000000, + 0x1EF01080, 0x12345678, + 0x1EF010C0, 0xFFFFFFF0, + 0x1EF010D0, 0x00000001}; + +const u32 gpuRegTopScreenInitTable[]={0x1EF00400, 0x000001C2, + 0x1EF00404, 0x000000D1, + 0x1EF00408, 0x000001C1, + 0x1EF0040C, 0x000001C1, + 0x1EF00410, 0x00000000, + 0x1EF00414, 0x000000CF, + 0x1EF00418, 0x000000D1, + 0x1EF0041C, 0x01C501C1, + 0x1EF00420, 0x00010000, + 0x1EF00424, 0x0000019D, + 0x1EF00428, 0x00000002, + 0x1EF0042C, 0x00000192, + 0x1EF00430, 0x00000192, + 0x1EF00434, 0x00000192, + 0x1EF00438, 0x00000001, + 0x1EF0043C, 0x00000002, + 0x1EF00440, 0x01960192, + 0x1EF00444, 0x00000000, + 0x1EF00448, 0x00000000, + 0x1EF0045C, 0x019000F0, + 0x1EF00460, 0x01C100D1, + 0x1EF00464, 0x01920002, + 0x1EF00470, 0x00080340, + 0x1EF0049C, 0x00000000, + + 0x1EF00468, 0x18300000, + 0x1EF0046C, 0x18300000, + 0x1EF00494, 0x18300000, + 0x1EF00498, 0x18300000, + 0x1EF00478, 0x18300000}; + +Result writeRegisterValues(Handle* handle, u32* table, u32 num) +{ + if(!table || !num)return -1; + int i; + Result ret; + for(i=0;i #include #include +#include Handle gspGpuHandle=0; @@ -78,7 +79,7 @@ Result GSPGPU_FlushDataCache(Handle* handle, u8* adr, u32 size) return cmdbuf[1]; } -Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size) +Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u32* data, u8 size) { if(!handle)handle=&gspGpuHandle; @@ -97,7 +98,28 @@ Result GSPGPU_WriteHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size) return cmdbuf[1]; } -Result GSPGPU_ReadHWRegs(Handle* handle, u32 regAddr, u8* data, u8 size) +Result GSPGPU_WriteHWRegsWithMask(Handle* handle, u32 regAddr, u32* data, u8 datasize, u32* maskdata, u8 masksize) +{ + if(!handle)handle=&gspGpuHandle; + + if(datasize>0x80 || !data)return -1; + + u32* cmdbuf=getThreadCommandBuffer(); + cmdbuf[0]=0x20084; //request header code + cmdbuf[1]=regAddr; + cmdbuf[2]=datasize; + cmdbuf[3]=(datasize<<14)|2; + cmdbuf[4]=(u32)data; + cmdbuf[5]=(masksize<<14)|0x402; + cmdbuf[6]=(u32)maskdata; + + Result ret=0; + if((ret=svc_sendSyncRequest(*handle)))return ret; + + return cmdbuf[1]; +} + +Result GSPGPU_ReadHWRegs(Handle* handle, u32 regAddr, u32* data, u8 size) { if(!handle)handle=&gspGpuHandle; -- 2.39.5